archive:sig:build
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archive:sig:build [2010/05/17 13:42] rblack6 |
archive:sig:build [2021/05/02 21:36] (current) |
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| * Systems Administrator - Walter Dworak | * Systems Administrator - Walter Dworak | ||
| - | ===== Proposals ===== | + | ===== Proposals and Purchases ===== |
| - | === First revision of proposals === | + | === Organization proposal === |
| - | [[http://acm.cs.uic.edu/sigbuild/sigbuild_proposal_100204.pdf]] \\ | + | [[http://acm.cs.uic.edu/~rblack6/sigbuild/SIGBUILDproposal.pdf]] \\ |
| - | === Final order list (submitted to CS dept) === | + | === Spring 2010 Order proposals === |
| - | [[http://acm.cs.uic.edu/~rblack6/acm requisition list final.xls]] \\ | + | [[http://acm.cs.uic.edu/~rblack6/sigbuild/sigbuild_proposal_100204.pdf]] \\ |
| + | |||
| + | === Spring 2010 Final order list (submitted to CS dept) === | ||
| + | [[http://acm.cs.uic.edu/~rblack6/sigbuild/acmsigbuildrequisitionlist.pdf]] \\ | ||
| + | |||
| + | === Fall 2010 Order list === | ||
| + | [[http://acm.cs.uic.edu/~rblack6/sigbuild/sigbuild_shopping_list_monitor_wall.pdf]] \\ | ||
| ===== Hardware 101 ===== | ===== Hardware 101 ===== | ||
| === Hardware Guides === | === Hardware Guides === | ||
| - | [[http://acm.cs.uic.edu/~rblack6/SIGBUILDguide.pdf]] \\ | + | [[http://acm.cs.uic.edu/~rblack6/sigbuild/SIGBUILDguide.pdf]] \\ |
| - | [[http://acm.cs.uic.edu/~rblack6/SIGBUILDguide1.pdf]] | + | [[http://acm.cs.uic.edu/~rblack6/sigbuild/SIGBUILDguide1.pdf]] |
| === Inventory === | === Inventory === | ||
| Line 28: | Line 34: | ||
| ==== VRUPL Lab ==== | ==== VRUPL Lab ==== | ||
| - | PROJECT LEADER: Robert Blackwood | + | PROJECT LEADER: Armando Diaz |
| DESCRIPTION: Dr. Bell's VRUPL lab is in need of repair and networking. We are going to assist in getting the lab into working condition. | DESCRIPTION: Dr. Bell's VRUPL lab is in need of repair and networking. We are going to assist in getting the lab into working condition. | ||
| Line 34: | Line 40: | ||
| === Status === | === Status === | ||
| - | In progress. | + | Date - Activity Performed |
| ==== COMPLETED: New AD Server aka "dvorak" ==== | ==== COMPLETED: New AD Server aka "dvorak" ==== | ||
| Line 63: | Line 69: | ||
| === Status === | === Status === | ||
| - | Andrew has (how many?) PC's networked together, and is working on getting different system software installed in all of them. | + | Date - Activity Performed |
| ==== CUDA Machine ==== | ==== CUDA Machine ==== | ||
| Line 77: | Line 84: | ||
| === Status === | === Status === | ||
| - | Jeremy and Robert have gotten the CUDA machine up and running with 3.5 cards working in Windows 7. All of the NVIDIA device drivers and updates have been installed, and the CUDA packages as well (including samples). | + | Date - Activity Performed |
| ==== Supercomputer ==== | ==== Supercomputer ==== | ||
| Line 87: | Line 95: | ||
| PURPOSE: //Josh Herman// - The Chicago-01 supercomputer project is a research oriented supercomputer. Its primary goals are to investigate the following: Run code such as PHCPack (the implementation of polynomial homotopies exploiting structure in order to better approximate all isolated solutions) or basically find an optimal solution for hard polynominal systems. Another goal is to perform research on a novel network architecture utilizing artin braid groups as a algebra of networks. This will allow for the addition and subtraction of nodes in the network to be topologically invariant by the use of concatenation of the artin braid group. The last goal is to explore the use of GPU and possibly reconfigurable computing architectures like FPGA gates for the optimization of tasks on the supercomputer. | PURPOSE: //Josh Herman// - The Chicago-01 supercomputer project is a research oriented supercomputer. Its primary goals are to investigate the following: Run code such as PHCPack (the implementation of polynomial homotopies exploiting structure in order to better approximate all isolated solutions) or basically find an optimal solution for hard polynominal systems. Another goal is to perform research on a novel network architecture utilizing artin braid groups as a algebra of networks. This will allow for the addition and subtraction of nodes in the network to be topologically invariant by the use of concatenation of the artin braid group. The last goal is to explore the use of GPU and possibly reconfigurable computing architectures like FPGA gates for the optimization of tasks on the supercomputer. | ||
| - | **Suggestion: Edit Purpose in such a way that people can understand what you are talking about** | + | === Status === |
| + | |||
| + | Date - Activity Performed | ||
| + | |||
| + | |||
| + | ==== Monitor Wall ==== | ||
| + | |||
| + | PROJECT LEADER: Andy Urquiaga | ||
| + | |||
| + | DESCRIPTION: The EVL (Electronic Visualization Labratory) donated a monitor wall, containing 30 monitors, to SIG-Build. The entire SIG has given input on this project to get the monitors synced and running. | ||
| + | |||
| + | PURPOSE: To have a fully functioning monitor wall for the Computer Science department at UIC to use and practice/apply SAGE (Scalable Adaptive Graphics Environment) programming on. | ||
| + | |||
| + | FURTHER READING: Information on SAGE: [[http://www.evl.uic.edu/core.php?mod=4&type=1&indi=281]] | ||
| + | |||
| + | === Status === | ||
| + | |||
| + | Date - Activity Performed | ||
| + | |||
| + | Andrew Sennebogen Currently has installed Ubuntu Linux on all servers with help form Walter Dworak. Currently we ran into a prablem: 4 video cards have single inputs when the monitor wall requires two input capability. Projected completion time: mid-Febuary | ||
| ===== Schedules ===== | ===== Schedules ===== | ||
| - | ==== Robert ==== | + | |
| - | Here's the link until I get embedding working: http://tigger.uic.edu/~rblack6/work.htm | + | |
archive/sig/build.1274103746.txt.gz · Last modified: 2021/05/02 21:36 (external edit)
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